Multilayer ceramic capacitor

ABSTRACT

A multilayer body includes an inner layer portion having a dimension in a stacking direction greater than a dimension of the inner layer portion in a width direction, a second outer layer portion including an outer portion including a second principle surface and an inner portion disposed adjacent to both of the outer portion and the inner layer portion, a dimension of the outer portion in the stacking direction being greater than a dimension of the inner portion, and a composition ratio of Si relative to Ti in the outer portion is greater than that in the inner portion.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to multilayer ceramic capacitors,multilayer ceramic capacitor arrays, and multilayer ceramic capacitormounted bodies.

2. Description of the Related Art

Japanese Unexamined Patent Application Publication No. 2012-248581discloses a multilayer ceramic capacitor that suppresses the occurrenceof cracks. In the multilayer ceramic capacitor described in JapaneseUnexamined Patent Application Publication No. 2012-248581, a base bodyincludes an inner electrode multilayer body (inner layer portion) inwhich a first inner electrode and a second internal electrode arestacked so as to face each other with a dielectric therebetween; and afirst dielectric multilayer body (outer layer) and a second dielectricmultilayer body (outer layer) that sandwich the inner electrodemultilayer body (inner layer portion) from both sides thereof in astacking direction. Further, the first dielectric multilayer body (outerlayer) including a first base body principal surface is formed so as tobe thicker than the second dielectric multilayer body (outer layer)including a second base body principal surface in the stackingdirection.

SUMMARY OF THE INVENTION

Modes of how cracks occur include a mode in which an outer stress isapplied to a dielectric layer of the multilayer ceramic capacitor andcauses a crack to occur therein. The outer stress is produced when asubstrate on which a multilayer ceramic capacitor is mounted issubjected to an external force.

The inventors of the present invention discovered another mode of theoccurrence of cracks. In this mode, the inventors discovered that aninner stress is produced due to a difference in thermal contractionrates between the dielectric layer and the conductive layer at the timeof firing of the multilayer ceramic capacitor, and this inner stress isapplied to a boundary between the inner layer portion and the outerlayer portion and causes a crack to occur (delamination).

In the multilayer ceramic capacitor described in Japanese UnexaminedPatent Application Publication No. 2012-248581, the occurrence of crackscaused by the external stress is significantly reduced or prevented,however, no consideration is given with regard to suppression of theoccurrence of cracks caused by the internal stress produced due to thedifference in thermal contraction rates between the dielectric layer andthe conductive layer.

Accordingly, preferred embodiments of the present invention provide amultilayer ceramic capacitor capable of significantly reducing orpreventing cracks caused by internal stress produced due to a differencein thermal contraction rates between the dielectric layer and theconductive layer.

A multilayer ceramic capacitor according to a preferred embodiment ofthe present invention includes a multilayer body including a pluralityof dielectric layers and a plurality of conductive layers, which arestacked therein in a stacking direction, and including a first principlesurface and a second principle surface that are opposite to each otherin the stacking direction, a first end surface and a second end surfacethat are opposite to each other in a length direction and connect thefirst principle surface and the second principle surface, and a firstside surface and a second side surface that are opposite to each otherin a width direction and connect the first principle surface and thesecond principle surface as well as the first end surface and the secondend surface, and first and second outer electrodes provided on portionsof a surface of the multilayer body and electrically connected to atleast one of the plurality of conductive layers, wherein the multilayerbody includes a first outer layer portion which includes a first of theplurality of dielectric layers closest to the first principle surface, asecond outer layer portion which includes a second of the plurality ofdielectric layers closest to the second principle surface, and an innerlayer portion adjacent to both of the first outer layer portion and thesecond outer layer portion, the inner layer portion including a portionextending from a first of the plurality of conductive layers closest tothe first principle surface to a second of the plurality of conductivelayers closest to the second principle surface in the stackingdirection, a dimension of the inner layer portion in the stackingdirection is greater than a dimension of the inner layer portion in thewidth direction, the second outer layer portion includes an outerportion including the second principle surface, and an inner portiondisposed adjacent to both of the outer portion and the inner layerportion, a dimension of the outer portion in the stacking direction isgreater than a dimension of the inner portion, and a composition ratioof Si relative to Ti in the outer portion is greater than that in theinner portion.

In the present application, the term “a composition ratio of Si relativeto Ti” indicates a value of Si mol/Ti mol, and the Si content can berecognized by element mapping, for example.

In a preferred embodiment of the present invention, the dimension of theinner layer portion in the stacking direction is greater than adimension of the multilayer body in the width direction.

In a preferred embodiment of the present invention, a boundary regionadjacent to the inner portion has a larger Si content compared to acentral region of the outer portion in the stacking direction.

In a preferred embodiment of the present invention, the first and secondouter electrodes are disposed on portions of the second principlesurface of the multilayer body, and a surface region including thesecond principle surface in the outer portion has a larger Si contentcompared to that of a central region of the outer portion in thestacking direction.

In a preferred embodiment of the present invention, a composition ratioof a rare earth element relative to Ti of the dielectric layers in theinner layer portion is higher than that in the outer portion.

In the present application, the term “a composition ratio of rare earthelement relative to Ti” indicates a value of rare earth mol/Ti mol.

In a preferred embodiment of the present invention, a composition ratioof Dy relative to Ti of the dielectric layers in the inner layer portionis higher than that in the outer portion.

In the present application, the term “composition ratio of Dy relativeto Ti” indicates a value of Dy mol/Ti mol.

In a preferred embodiment of the present invention, each of acomposition ratio of Mn relative to Ti of the dielectric layers in theinner layer portion, a composition ratio of Mn relative to Ti of thedielectric layers in the first outer layer portion, and a compositionratio of Mn relative to Ti of the dielectric layers in the innerportion, is higher than that in the outer portion.

In the present application, the term “a composition ratio of Mn to Ti”indicates a value of Mn mol/Ti mol.

In a preferred embodiment of the present invention, the compositionratio of Si relative to Ti in the outer portion is about 0.004 higherthan that in the inner portion, the composition ratio of Si relative toTi in the outer portion is not less than about 0.013 and not larger thanabout 0.03, a composition ratio of a rare earth element compositionrelative to Ti in the dielectric layers of the inner layer portion isnot less than about 0.003, and a composition ratio of a rare earthelement relative to Ti in the outer portion is less than about 0.003,each of a composition ratio of Mn relative to Ti in the dielectriclayers of the inner layer portion, a composition ratio of Mn relative toTi of the dielectric layers in the first outer layer portion, and acomposition ratio of Mn relative to Ti of the dielectric layers in theinner portion is not less than about 0.0008, and a composition ratio ofMn relative to Ti in the outer portion is not more than about 0.0008.

According to another preferred embodiment of the present invention, amultilayer ceramic capacitor series includes a plurality of multilayerceramic capacitors, each of the plurality of multilayer ceramiccapacitors being the multilayer ceramic capacitor according to one ofthe preferred embodiments of the present invention described above, anda package including a carrier tape and a cover tape, the carrier tapeincluding a plurality of cavities disposed apart from each other inwhich the plurality of multilayer ceramic capacitors are stored, thecover tape being attached to the carrier tape and covering the pluralityof cavities, wherein the second principle surfaces of the plurality ofmultilayer ceramic capacitors face bottoms of the plurality ofrespective cavities.

According to a further preferred embodiment of the present invention, amultilayer ceramic capacitor mount body includes the multilayer ceramiccapacitor according to one of the preferred embodiments of the presentinvention described above, a substrate on which the multilayer ceramiccapacitor is mounted, wherein the second principle surface of themultilayer ceramic capacitor faces the substrate.

Various preferred embodiments of the present invention, andmodifications and combinations thereof, significantly reduce or preventthe occurrence of cracks caused by the internal stress produced due tothe difference in thermal contraction rates between the dielectric layerand the conductive layer.

The above and other elements, features, steps, characteristics andadvantages of the present invention will become more apparent from thefollowing detailed description of the preferred embodiments withreference to the attached drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a perspective view illustrating an exterior of a multilayerceramic capacitor according to preferred embodiment 1 of the presentinvention.

FIG. 2 is a cross sectional view of the multilayer ceramic capacitor ofFIG. 1 viewed from a line II-II arrow direction.

FIG. 3 is a cross sectional view of the multilayer ceramic capacitor ofFIG. 1 viewed from a line III-III arrow direction.

FIG. 4 is a cross sectional view of the multilayer ceramic capacitor ofFIG. 2 viewed from a line IV-IV arrow direction.

FIG. 5 is a cross sectional view of the multilayer ceramic capacitor ofFIG. 2 viewed from a line V-V arrow direction.

FIG. 6 is a flowchart illustrating a fabrication method of multilayerceramic capacitor according to the preferred embodiment 1 of the presentinvention.

FIG. 7 is an exploded perspective view illustrating a multilayerstructure of a sheet group unit that forms a partial multilayer bodybefore formation of an outer portion of a multilayer ceramic capacitoraccording to the preferred embodiment 1 of the present invention.

FIG. 8 is a cross sectional view illustrating a state where a mothersheet group is being pressure-bonded.

FIG. 9 is a cross sectional view illustrating a state where a mothersheet group pressured-bonded at step S15 and a plurality of secondceramic green sheets are being pressure-bonded.

FIG. 10 is a cross sectional view illustrating a structure of amultilayer ceramic capacitor mounted body according to the preferredembodiment 1 of the present invention.

FIG. 11 is a plan view illustrating a structure of a multilayer ceramiccapacitor array according to the preferred embodiment 1 of the presentinvention.

FIG. 12 is a cross sectional view of the multilayer ceramic capacitorarray of FIG. 11 viewed from a line XII-XII arrow direction.

FIG. 13 is a cross sectional view illustrating a state where a mothersheet group of a multilayer ceramic capacitor according to preferredembodiment 2 of the present invention is being pressure-bonded.

FIG. 14 is a cross sectional view illustrating a halfway state where amother sheet group and a plurality of second ceramic green sheets arebeing pressure-bonded.

FIG. 15 is a cross sectional view illustrating a state where a mothermultilayer body is cut.

FIG. 16 is a schematic view illustrating a state where a substrate onwhich a multilayer ceramic capacitor is mounted is bent in exemplaryexperiment 2.

FIG. 17 is a view illustrating an example of a magnified image of across section of a multilayer ceramic capacitor observed with a scanningelectron microscope.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

A multilayer ceramic capacitor, a multilayer ceramic capacitor arrayincluding the multilayer ceramic capacitor, and a multilayer ceramiccapacitor mounted body according to respective preferred embodiments ofthe present invention are described below with reference to thedrawings. In the description of preferred embodiments below, the samereference numerals are assigned to the same or corresponding portions inthe drawings, and description thereof will not be repeated.

Preferred Embodiment 1

FIG. 1 is a perspective view illustrating an exterior of a multilayerceramic capacitor according to the preferred embodiment 1 of the presentinvention. FIG. 2 is a cross sectional view of the multilayer ceramiccapacitor of FIG. 1 viewed from a line II-II arrow direction. FIG. 3 isa cross sectional view of the multilayer ceramic capacitor of FIG. 1viewed from a line III-III arrow direction. FIG. 4 is a cross sectionalview of the multilayer ceramic capacitor of FIG. 2 viewed from a lineIV-IV arrow direction. FIG. 5 is a cross sectional view of themultilayer ceramic capacitor of FIG. 2 viewed from a line V-V arrowdirection. In FIGS. 1 to 5, L denotes a lengthwise direction of amultilayer body which will be described below, W denotes a widthwisedirection of the multilayer body, and T denotes a thickness direction ofthe multilayer body.

As illustrated in FIGS. 1 to 5, a multilayer ceramic capacitor 10according to the preferred embodiment 1 of the present inventionincludes a multilayer body 11 and a pair of outer electrodes 14. Themultilayer body 11 includes a plurality of dielectric layers 12 and aplurality of conductive layers 13, which are stacked on each other, andis provided with a first principle surface 111 and a second principlesurface 112 that are arranged opposite to each other in a stackingdirection. The pair of outer electrodes 14 is provided at portions ofthe surface of the multilayer body 11 and is electrically connected toall the conductive layers 13.

The stacking direction of the dielectric layers 12 and the conductivelayers 13 is perpendicular or substantially perpendicular to thelengthwise direction L of the multilayer body 11 and the widthwisedirection W of the multilayer body 11. In other words, the stackingdirection of the dielectric layers and the conductive layers 13 isparallel or substantially parallel to the thickness direction T of themultilayer body 11.

The multilayer body 11 further includes a first end surface 113 and asecond end surface 114 that connect the first principle surface 111 andthe second principle surface 112 and are arranged at opposite sides ofthe multilayer body 11. The multilayer body 11 still further includes afirst side surface 115 and a second side surface 116 that connect thefirst principle surface 111 and the second principle surface 112,connect the first end surface 113 and the second end surface 114, andare arranged at opposite sides of the multilayer body 11. A minimumdistance between the first side surface 115 and the second side surface116 is less than a minimum distance between the first end surface 113and the second end surface 114. In other words, a measurement W₀ of themultilayer body 11 in the widthwise direction W is less than a dimensionof the multilayer body 11 in the lengthwise direction L. Externally themultilayer body 11 preferably has a cuboid or substantially cuboidshape, for example. Alternatively, the corner portion or the ridgeportion or both of the multilayer body 11 may be rounded.

The multilayer body 11 includes an inner layer portion 11 m, and a firstouter layer portion 12 b ₁ and a second outer layer portion 12 b ₂ withthe inner layer portion 11 m located therebetween. The inner layerportion 11 m includes, of the plurality of conductive layers 13, aconductive layer 13 arranged closest to the first principle surface 111side to a conductive layer 13 arranged closest to the second principlesurface 112 side in the stacking direction of the multilayer body 11.

The plurality of dielectric layers 12 includes a plurality of firstdielectric layers 12 x and a second dielectric layer 12 y, whichpreferably include ceramic green sheets containing different materialsfrom each other, which will be described below.

The first outer layer portion 12 b ₁ includes, of the plurality ofdielectric layers 12, a first dielectric layer 12 x arranged closest tothe first principle surface 111 side. The second outer layer portion 12b ₂ includes an outer portion 12 b ₂₂ and an inner portion 12 b ₂₁. Theouter portion 12 b ₂₂ preferably includes the second dielectric layer 12y, which is one of the plurality of dielectric layers 12, arrangedclosest to the second principle surface 112 side. The inner portion 12 b₂₁ preferably includes a first dielectric layer 12 x arranged next tothe outer portion 12 b ₂₂ at the first principle surface 111 side. Here,the configuration of the first outer layer portion 12 b ₁ is not limitedto the foregoing one. Alternatively, the first outer layer portion 12 b₁ may include an outer portion and an inner portion wherein the outerportion preferably includes the second dielectric layer 12 y, which isone of the plurality of dielectric layers 12, arranged closest to thefirst principle surface 111 side, and the inner portion preferablyincludes a first dielectric layer 12 x that is arranged next to theouter portion at the second principle surface 112 side.

In the inner layer portion 11 m, a partial set of the plurality ofdielectric layers 12 x and all the conductive layers 13 are stacked insuch a way that the first dielectric layers 12 x and the conductivelayers 13 are stacked on top of each other in an alternating fashion. Inother words, the inner layer portion 11 m includes all the conductivelayers 13. Each conductive layer preferably has a rectangular orsubstantially rectangular shape in planar view.

In the present preferred embodiment, all the conductive layers 13 areelectrically connected to the pair of outer electrodes 14, but it is notlimited thereto. In another preferred embodiment, at least a partial setof the plurality of conductive layers 13 may be electrically connectedto the pair of outer electrodes 14. In other words, the plurality ofconductive layers 13 may include a conductive layer 13 that is notelectrically connected to the pair of outer electrodes 14.

The pair of outer electrodes 14 is provided at both sides of themultilayer body 11 in the lengthwise direction L. Specifically, one ofthe pair of outer electrodes 14 is provided at the first end surface 113side of the multilayer body 11 in the lengthwise direction L, and theother outer electrode 14 is provided at the second end surface 114 sideof the multilayer body 11 in the lengthwise direction L. In the presentpreferred embodiment, one of the pair of outer electrodes 14 ispreferably arranged so as to extend from the first end surface 113 tothe first principle surface 111, the second principle surface 112, thefirst side surface 115, and the second side surface 116. The other outerelectrode 14 is preferably arranged so as to extend from the second endsurface 114 to the first principle surface 111, the second principlesurface 112, the first side surface 115, and the second side surface116. The arrangement of the pair of outer electrodes 14 is, however, notlimited to the foregoing one. A different arrangement may be used aslong as the pair of outer electrodes 14 is disposed on portions of thesurface of the multilayer body 11, has electrical connections with atleast some of the plurality of conductive layers 13, and makes itpossible the multilayer ceramic capacitor 10 to be mounted.

One of the pair of outer electrodes 14 is connected to a partial set ofthe plurality of conductive layers 13 at the first end surface 113. Theother outer electrode 14 is connected to the remaining set of theplurality of conductive layers 13 at the second end surface 114. Thepartial set of the conductive layers 13 and the remaining set of theconductive layers 13 are stacked in alternating fashion so as to faceeach other in the inner layer portion 11 m with the first dielectriclayer 12 x therebetween.

As illustrated in FIG. 3, a thickness T₁ of the inner layer portion 11 min the stacking direction of the multilayer body 11 is larger than awidth measurement W₁ of the inner layer portion 11 m, in which theplurality of conductive layers 13 are present, in the widthwisedirection W of the multilayer body 11, which is a direction connectingthe first side surface 115 and the second side surface 116 with aminimum distance. The thickness T₁ of the inner layer portion 11 m inthe stacking direction of the multilayer body 11 preferably is largerthan the width measurement W₀ of the multilayer body 11 in the directionconnecting the first side surface 115 and the second side surface 116with the minimum distance.

Preferably, a thickness h₂₂ of the outer portion 12 b ₂₂ is equal to orlarger than a thickness h₂₁ of the inner portion 12 b ₂₁. Preferably,the thickness h₂₂ of the outer portion 12 b ₂₂ is about 30 μm or more,for example, as will be described below. Preferably, the thickness h₂₁of the inner portion 12 b ₂₁ is about 20 μm or more, for example, aswill be described below.

In the present preferred embodiment, the second outer layer portion 12 b₂ is thicker than the first outer layer portion 12 b ₁. In other words,a thickness h₂ of the second outer layer portion 12 b ₂ is larger than athickness h₁ of the first outer layer portion 12 b ₁. The inner portion12 b ₂₁ is thicker than the first outer layer portion 12 b ₁. In otherwords, the thickness h₂₁ of the inner portion 12 b ₂₁ is larger than thethickness h₁ of the first outer layer portion 12 b ₁. Alternatively, thethickness h₂₁ of the inner portion 12 b ₂₁ may be equal to or less thanthe thickness h₁ of the first outer layer portion 12 b ₁, for example.

A thickness T₀ of the multilayer body 11 in the stacking direction ofthe multilayer body 11 preferably is equal or substantially equal to asum of the thickness T₁ of the inner layer portion 11 m, the thicknessh₁ of the first outer layer portion 12 b ₁, and the thickness h₂ of thesecond outer layer portion 12 b ₂.

Preferably, in the widthwise direction of the multilayer body 11, amaximum measurement of side gaps 12 c, which are gaps between the innerlayer portion 11 m and respective ones of the first side surface 115 andthe second side surface 116, is larger than the thickness h₁ of thefirst outer layer portion 12 b ₁, as will be described below. Morepreferably, an average measurement ((W₀−W₁)/2) of the side gaps 12 c islarger than the thickness h₁ of the first outer layer portion 12 b ₁.Still more preferably, the maximum measurement or the averagemeasurement ((W₀−W₁)/2) of the side gaps 12 c is larger than about 30 μmand less than about 90 μm, for example Further, the maximum measurementof the side gap 12 c is preferably larger than the thickness h₂₁ of theinner portion 12 b ₂₁.

Next, each element of the multilayer ceramic capacitor 10 is describedin detail.

A metal such as Ni, Cu, Ag, Pd, Au, or the like, or an alloy includingat least one of the foregoing metals such as, for example, an alloy ofAg and Pd or the like may be used as a material for forming each layerof the plurality of conductive layers 13. Preferably, the thicknesses ofeach layer of the plurality of conductive layers 13 is not less thanabout 0.3 μm and not more that about 2.0 μm after firing, for example.

Each one of the pair of outer electrodes 14 preferably includes a baselayer preferably arranged so as to cover one of two end portions of themultilayer body 11 and a plated layer provided so as to cover this baselayer. As a material for forming the base layer, a metal such as Ni, Cu,Ag, Pd, Au, or the like, or an alloy including at least one of theforegoing metals such as, for example, an alloy of Ag and Pd or the likemay be used. Preferably, the thickness of the base layer is not lessthan about 10.0 μm and not more than about 50.0 μm, for example.

The base layer may be formed by using a method in which electricallyconductive paste is baked after being applied on both end portions ofthe multilayer body 11 that has been subjected to firing or a method inwhich electrically conductive paste applied on both end portions of themultilayer body 11 before firing is baked together with the conductivelayers 13. Alternatively, the base layer may be formed by using a methodin which both end portions of the multilayer body 11 are plated or amethod in which electrically conductive resin including thermoset resinis cured after being applied on both end portions of the multilayer body11.

In the case that the base layer is formed from the electricallyconductive resin, a load applied to the multilayer body 11 due to anexternal stress, which is produced when a component-receiving body onwhich the multilayer ceramic capacitor 10 is mounted is bent by anexternal force, may be reduced, and the occurrence of cracks in themultilayer body 11 is significantly reduced or prevented. Thus, makingthe second outer layer portion 12 b ₂ thicker and forming the pair ofouter electrodes 14 from the electrically conductive resin achievefurther reduction or prevention of the occurrence of cracks in themultilayer body 11.

As a material for forming the plated layer, a metal such as Sn, Ni, Cu,Ag, Pd, Au, or the like, or an alloy including at least one of theforegoing metals such as, for example, an alloy of Ag and Pd or the likemay be used.

The plated layer may include a plurality of layers, for example. In thiscase, it is preferable that the plated layer has a double layerstructure in which a Sn plated layer is provided on a Ni plated layer.The Ni plated layer defines and serves as a solder barrier layer. The Snplated layer has excellent solderablity. Preferably, the thickness ofthe plated layer at each layer is not less than about 1.0 μm and notmore than about 10.0 μm, for example.

Each layer of the plurality of dielectric layers 12 preferably includes,as a primary component, a perovskite type compound that is representedas ABO₃ where A contains Ba, B contains Ti, and O is oxygen. In otherwords, each layer of the second dielectric layer 12 y and the pluralityof the first dielectric layers 12 x preferably includes BaTiO₃, bariumtitanate, as the primary component.

Further, each layer of the plurality of dielectric layers 12 preferablyincludes Si as an accessory component. Si is contained as the accessorycomponent by adding glass or a Si compound such as SiO₂ or the like tothe primary component, namely, the perovskite type compound representedas ABO₃. In addition, a Mn compound, a Mg compound, a Co compound, a Nicompound, a rare earth compound or the like may be added to the primarycomponent, namely, the perovskite type compound represented as ABO₃.

The materials of the second dielectric layer 12 y of the outer portion12 b ₂₂ have a higher Si composition ratio relative to Ti, compared tothe materials of each one of a partial set of the first dielectriclayers 12 x included in the inner layer portion 11 m, the firstdielectric layer 12 x of the first outer layer portion 12 b ₁, and thefirst dielectric layer 12 x of the inner portion 12 b ₂₁. The Sicomposition ratio as well as other constituent's composition ratios maybe expressed as the molar ratio. In the following description, thecomposition ratio is expressed as the molar ratio. The molar ratio of Sirelative to Ti at each layer of the plurality of dielectric layers 12may be measured by using a wavelength-dispersive X-ray spectrometer(WDX).

Preferably, the molar ratio of Si relative to Ti in the materials of thesecond dielectric layer 12 y of the outer portion 12 b ₂₂ is not lessthan about 0.013 and not larger than about 0.03, for example. In thecase where the molar ratio of Si relative to Ti in the materials of thesecond dielectric layer 12 y of the outer portion 12 b ₂₂ is not lessthan about 0.013 and not larger than about 0.03, the reliability of theouter portion 12 b ₂₂ may become lower.

The molar ratio of Si relative to Ti in the materials of the seconddielectric layer 12 y of the outer portion 12 b ₂₂ is higher preferablyby about 0.004 or more, and more preferably about 0.008 or more, forexample, compared to the molar ratio of Si relative to Ti in thematerials of the first dielectric layer 12 x forming the inner portion12 b ₂₁.

A boundary portion 12 z of the outer portion 12 b ₂₂ with the innerportion 12 b ₂₁ has a larger Si content compared to a middle portion 12m of the outer portion 12 b ₂₂. Further, a top layer portion 12 s of theouter portion 12 b ₂₂ on the second principle surface 112 side has alarger Si content compared to the middle portion 12 m of the outerportion 12 b ₂₂. The boundary portion 12 z and the top layer portion 12s having larger Si content in the outer portion 12 b ₂₂ may each beidentified from element mapping performed with a field emissionwavelength-dispersive X-ray spectrometer (FE-WDX).

Next, a non-limiting example of a fabrication method of the multilayerceramic capacitor 10 according to the present preferred embodiment isdescribed.

FIG. 6 is a flowchart illustrating a non-limiting example of afabrication method of multilayer ceramic capacitor according to thepreferred embodiment 1 of the present invention. The fabrication methodof multilayer ceramic capacitor described below is a method in which themultilayer ceramic capacitors 10 are mass-produced simultaneously. Inthis method, a mother multilayer body is fabricated by performing batchprocessing up to a midway stage of the fabrication process, subsequentlythe mother multilayer body is cut into individual pieces, and then softmultilayer bodies obtained after the cutting are subjected to anotherprocessing to obtain a plurality of the multilayer ceramic capacitors10.

As illustrated in FIG. 6, when fabricating the multilayer ceramiccapacitor 10, a first ceramic slurry is prepared first (step S11).Specifically, ceramic powder, binder, solvent, and the like are mixed ata predetermined mixture ratio to form the first ceramic slurry.

Next, a first ceramic green sheet is formed (step S12). Specifically,the first ceramic green sheet is produced by forming the first ceramicslurry into a sheet shape on a carrier film by using a die coater, agravure coater, a microgravure coater, or the like.

Next, a mother sheet is formed (step S13). Specifically, the mothersheet in which a predetermined electrically conductive pattern isprovided on the first ceramic green sheet is formed by printing anelectrically conductive paste on the first ceramic green sheet so as toform a predetermined pattern by using a screen printing method or agravure printing method or the like.

The mother sheet to be manufactured is now described. FIG. 7 is anexploded perspective view illustrating a multilayer structure of a sheetgroup unit that forms a partial multilayer body before formation of anouter portion of a multilayer ceramic capacitor according to thepreferred embodiment 1 of the present invention.

As illustrated in FIG. 7, a partial multilayer body 11 p is fabricatedby using as a constituent material a sheet group unit including aplurality of unit sheets 120 a, 130 a, and 130 b, whose structures aredifferent from each other. More specifically, the partial multilayerbody 11 p is fabricated by stacking these plural unit sheets 120 a, 130a, and 130 b whose structures are different from each other in apredetermined order and then subjecting them to pressure-bonding andfiring.

The unit sheet 120 a preferably includes only a ceramic base material 12xr and has no electrically conductive pattern is formed on its topsurface. The unit sheet 120 a becomes a portion that forms the firstdielectric layer 12 x of the inner portion 12 b ₂₁ or the first outerlayer portion 12 b ₁ after firing.

The unit sheets 130 a and 130 b are each formed in such a way that anelectrically conductive pattern 13 r having a predetermined shape isformed on the top surface of the ceramic base material 12 xr. Theelectrically conductive patterns 13 r of the unit sheets 130 a and 130 bbecome portions that form the conductive layers 13 of the inner layerportion 11 m after firing. Further, the ceramic base material 12 xr ofthe unit sheets 130 a and 130 b become portions that form the firstdielectric layers 12 x of the inner layer portion 11 m after firing.

The mother sheet has a layout in which a plurality of unit sheets havingthe same or substantially the same shape is arranged to form a planararray. Here, each unit sheet forms a unit block therein and correspondsto each one of the unit sheets 130 a and 130 b illustrated in FIG. 7.

Here, the unit sheet 130 a and the unit sheet 130 b preferably have thesame or substantially the same shape. Thus, mother sheets having thesame or substantially the same electrically conductive pattern may beused as the mother sheets including the unit sheets 130 a and the unitsheets 130 b. The multilayer structure of the unit sheets 130 a and 130b illustrated in FIG. 7 may be obtained by stacking the mother sheetshaving the same or substantially the same electrically conductivepattern while displacing each mother sheet by the amount of a half pitchduring a stacking process of the mother sheets, which will be describedbelow.

In addition to the mother sheets having the electrically conductivepattern 13 r, the first ceramic green sheets that are fabricated withoutgoing through the step S13 are also prepared as the mother sheets.

Next, the mother sheets are stacked (step S14). Specifically, stacking aplurality of the mother sheets according to a predetermined rule allowsthe unit blocks to be arranged in such a way that each unit block hasthe multilayer structure illustrated in FIG. 7 in the stacking directionwithin a mother sheet group after stacking.

Next, the mother sheet group is pressure-bonded (step S15). FIG. 8 is across sectional view illustrating a state where the mother sheet groupis being pressure-bonded. FIG. 8 illustrates only a portion thatcorresponds to one of partial multilayer bodies 11 p. As illustrated inFIG. 8, in the present preferred embodiment, a plurality of the mothersheets forming the first outer layer portion 12 b ₁, a plurality of themother sheets forming the inner layer portion 11 m, and a plurality ofthe mother sheets forming the inner portion 12 b ₂₁ are stacked in thisorder to form the mother sheet group.

The mother sheet group placed on a base 90 is being compressed andpressure-bonded by pressing a die plate 91 from the side of the mothersheets that form the inner portion 12 b ₂₁ in the stacking direction ofthe mother sheet group as denoted by an arrow 92.

Next, a second ceramic slurry is prepared (step S21). Specifically,ceramic power, binder, solvent, and the like are mixed at apredetermined mixture ratio to form the second ceramic slurry. Comparedto the first ceramic slurry, more Si is added to the second ceramicslurry.

Next, a second ceramic green sheet is formed (step S22). Specifically,the second ceramic green sheet is produced by forming the second ceramicslurry into a sheet shape on a carrier film by using a die coater, agravure coater, a microgravure coater, or the like.

Next, a plurality of the second ceramic green sheets is stacked on themother sheet group that is pressure-bonded at step S15 (step S23).Specifically, a plurality of the second ceramic green sheets is stackedon the mother sheets forming the inner portion 12 b ₂₁. The secondceramic green sheet preferably includes only a ceramic base material 12yr that forms the second dielectric layer 12 y of the outer portion 12 b₂₂. Alternatively, instead of stacking the plurality of the secondceramic green sheets including only the ceramic base material 12 yr, apaste containing the second ceramic slurry may be applied over themother sheet forming the inner portion 12 b ₂₁.

Next, the mother sheet group that is pressure-bonded at step S15 and theplurality of the second ceramic green sheets are pressure-bonded (stepS24). FIG. 9 is a cross sectional view illustrating a state where themother sheet group pressured-bonded at step S15 and the plurality of thesecond ceramic green sheets are being pressure-bonded. FIG. 9illustrates only a portion that corresponds to a one of soft multilayerbodies 11 q. As illustrated in FIG. 9, the mother sheet group that ispressure-bonded at step S15 and the plurality of the second ceramicgreen sheets are being compressed and pressure-bonded by pressing downthe die plate 91 from the side of the mother sheets of the outer portion12 b ₂₂ along the stacking direction of the mother sheet group asdenoted by the arrow 92. This completes the fabrication of the mothermultilayer body.

Next, the mother multilayer body is cut (step S25). Specifically, themother multilayer body is cut by shearing or dicing to separate incolumns and rows, thus cutting into soft multilayer bodies 11 q.

Next, firing of the soft multilayer bodies 11 q is performed (step S26).Specifically, the soft multilayer bodies 11 q that are cut out areheated up to a predetermined temperature to perform firing of ceramicdielectric materials and an electrically conductive material. The firingtemperature may be set in response to types of the ceramic dielectricmaterials and the electrically conductive material. For example, thefiring temperature may be set in a range from about 900 degrees C. toabout 1300 degrees C. inclusive.

Next, barrel finishing of the soft multilayer bodies 11 q is performed(step S27). Specifically, the soft multilayer bodies 11 q after firingare sealed in a small box called a barrel with a media ball having ahigher hardness compared to ceramic materials, and this barrel is beingtumbled to polish the soft multilayer bodies 11 q. This makes itpossible to provide curved roundness at the outer surfaces (particularlyat corner portions and ridge portions) of the soft multilayer bodies 11q, and completes the formation of the multilayer body 11.

Next, the outer electrodes are formed (step S28). Specifically, a metalfilm is formed by painting an electrically conductive paste at an endportion of a portion of the multilayer body 11, which includes the firstend surface 113, and at an end portion of another portion of themultilayer body 11, which includes the second end surface 114. Further,after these metal films are subjected to firing, the metal films aresubjected to Ni plating and Sn plating in sequence. This completes theformation of a pair of outer electrodes 14 on the outer surface of themultilayer body 11.

A series of the foregoing steps makes possible the fabrication of themultilayer ceramic capacitor 10 having the structure illustrated inFIGS. 1 to 5.

In the multilayer ceramic capacitor 10 according to the presentpreferred embodiment, the materials of the second dielectric layer 12 yof the outer portion 12 b ₂₂ preferably have a higher molar ratio of Sirelative to Ti, compared to the materials of each one of the partial setof the first dielectric layers 12 x included in the inner layer portion11 m and the first dielectric layer 12 x of the inner portion 12 b ₂₁.In other words, the outer portion 12 b ₂₂ includes more Si than theinner portion 12 b ₂₁. The dielectric layer having a larger Si contenthas a higher thermal contraction rate at the time of firing. Thus, atthe time of firing, the thermal contraction rate of the outer portion 12b ₂₂ is larger than that of the inner portion 12 b ₂₁. As a result, thethermal contraction rate of the outer portion 12 b ₂₂ approaches thethermal contraction rate of the conductive layer 13 in the inner layerportion 11 m.

Accordingly, in the multilayer ceramic capacitor 10, the internal stressis alleviated that is caused by a difference in thermal contractionratio between the conductive layer and the dielectric layer at the timeof firing and that is applied to the boundary between the inner layerportion 11 m and the second outer layer portion 12 b ₂. Thissignificantly reduces or prevents the occurrence of cracks(delamination) at the boundary between the inner layer portion 11 m andthe second outer layer portion 12 b ₂.

In the case where the molar ratio of Si relative to Ti in the materialsof the second dielectric layer 12 y of the outer portion 12 b ₂₂preferably is higher by about 0.004 or more, compared to that of thefirst dielectric layer 12 x of the inner portion 12 b ₂₁, the occurrenceof cracks (delamination) is effectively reduced or prevented at theboundary between the inner layer portion 11 m and the second outer layerportion 12 b ₂. Further, in the case where this molar ratio preferablyis higher by about 0.008 or more, the occurrence of cracks(delamination) is more effectively reduced or prevented at the boundarybetween the inner layer portion 11 m and the second outer layer portion12 b ₂.

When the thickness of the outer portion 12 b ₂₂ is equal to or largerthan that of the inner portion 12 b ₂₁ as described in the above, theeffects of the stress alleviation caused by the thermal contraction ofthe outer portion 12 b ₂₂ may reach the boundary between the inner layerportion 11 m and the second outer layer portion 12 b ₂ more easily.

When the thickness h₂₂ of the outer portion 12 b ₂₂ is about 30 μm ormore, a contraction force that is equal to or larger than a requiredvalue may be secured. The contraction force acts on the inner portion 12b ₂₁ due to the thermal contraction of the outer portion 12 b ₂₂.

When the thickness h₂₁ of the inner portion 12 b ₂₁ is about 20 μm ormore, dispersion of Si contained in the outer portion 12 b ₂₂ into theinner layer portion 11 m is significantly reduced or prevented. When theSi content at the inner layer portion 11 m becomes too large, graingrowth of ceramic particles advances too far at the time of firing inthe first dielectric layer 12 x included in the inner layer portion 11m, and voltage endurance of the first dielectric layer 12 x decreases.As a result, the inner layer portion 11 m becomes prone to shortcircuit. Thus, in the case where the thickness h₂₁ of the inner portion12 b ₂₁ is about 20 μm or more, the voltage endurance of the firstdielectric layer 12 x included in the inner layer portion 11 m ismaintained, and the occurrence of short circuit is significantly reducedor prevented.

As described above, the thickness h₂₁ of the inner portion 12 b ₂₁ islarger than the thickness h₁ of the first outer layer portion 12 b ₁. Aswill be described below, the boundary portion 12 z of the outer portion12 b ₂₂ with the inner portion 12 b ₂₁ improves a sticking force betweenthe outer portion 12 b ₂₂ and the inner portion 12 b ₂₁. Therefore, evenif the inner portion 12 b ₂₁ is made somewhat thicker, the occurrence ofcracks (delamination) is significantly reduced or prevented at theboundary between the outer portion 12 b ₂₂ and the inner portion 12 b₂₁. Accordingly, the contraction force due to the thermal contraction ofthe outer portion 12 b ₂₂ is allowed to act on the inner portion 12 b₂₁. This makes it possible to alleviate the internal stress applied tothe boundary between the inner layer portion 11 m and the inner portion12 b ₂₁ due to the difference in thermal contraction ratio between theconductive layer and the dielectric layer at the time of firing, andsignificantly reduce or prevent the occurrence of cracks (delamination)at the boundary between the inner layer portion 11 m and the secondouter layer portion 12 b ₂.

As described above, the maximum measurement of the side gap 12 c ispreferably larger than the thickness h₁ of the first outer layer portion12 b ₁. In the case where the first outer layer portion 12 b ₁ is madethinner, the internal stress, which acts on the boundary between theinner layer portion 11 m and the first outer layer portion 12 b ₁ due tothe difference in thermal contraction ratio between the conductive layerand the dielectric layer at the time of firing, is alleviated. Thismakes it possible to significantly reduce or prevent the occurrence ofcracks (delamination) at the boundary between the inner layer portion 11m and the first outer layer portion 12 b ₁. In the case where thethickness h₂₁ of the inner portion 12 b ₂₁ is about 20 μm or more, thedispersion of Si contained in the outer portion 12 b ₂₂ into the innerlayer portion 11 m is significantly reduced or prevented. In the casewhere the Si content at the inner layer portion 11 m becomes too large,the grain growth of ceramic particles advances too far at the time offiring in the first dielectric layer 12 x included in the inner layerportion 11 m, and the voltage endurance of the first dielectric layer 12x decreases. As a result, the inner layer portion 11 m becomes prone toshort circuits. Thus, in the case where the thickness h₂₁ of the innerportion 12 b ₂₁ is about 20 μm or more, the voltage endurance of thefirst dielectric layer 12 x included in the inner layer portion 11 mpreferably is maintained, and the occurrence of short circuit issignificantly reduced or prevented.

On the other hand, in the case where the maximum measurement of the sidegap 12 c is made larger, it becomes easier to apply load pressure to aplurality of the first dielectric layers 12 x present at the side gaps12 c at the time of pressure bonding the mother sheet group. Thisimproves adhesiveness among the first dielectric layers 12 x present atthe side gaps 12 c. As a result, the occurrence of cracks (delamination)is significantly reduced or prevented at the first dielectric layers 12x present at the side gaps 12 c.

As described above, the average measurement ((W₀−W₁)/2) of the side gaps12 c is more preferably larger than the thickness h₁ of the first outerlayer portion 12 b ₁. The average measurement ((W₀−W₁)/2) of the sidegaps 12 c corresponds to one half of a sum of adjacent side gaps 12 cthat belong to two multilayer bodies lying next to each other when themother multilayer body is cut into individual multilayer bodies. Thus,in the case where the average measurement ((W₀−W₁)/2) of the side gaps12 c is made larger than the thickness h₁ of the first outer layerportion 12 b ₁, it becomes easier to apply load pressure to a pluralityof the first dielectric layers 12 x present at the side gaps 12 c at thetime of pressure bonding the mother sheet group. This improves theadhesiveness among the first dielectric layers 12 x present at the sidegaps 12 c. As a result, the occurrence of cracks (delamination) issignificantly reduced or prevented at the first dielectric layers 12 xpresent at the side gaps 12 c. In other words, both the suppressioneffects against the occurrence of short circuit in the inner layerportion 11 m and the occurrence of cracks (delamination) are achieved ina more stable manner even in the case where the dimension of the sidegap 12 c at the first side surface 115 side differs from the dimensionof the side gap 12 c at the second side surface 116 side.

As described above, the maximum measurement of the side gaps 12 c ispreferably larger than the thickness h₂₁ of the inner portion 12 b ₂₁.In the case where the inner portion 12 b ₂₁ is made thinner, it becomeseasier to allow the contraction force due to the thermal contraction ofthe outer portion 12 b ₂₂ to act on the inner portion 12 b ₂₁. Thismakes it possible to alleviate the internal stress applied to theboundary between the inner layer portion 11 m and the inner portion 12 b₂₁ due to the difference in thermal contraction ratio between theconductive layer and the dielectric layer at the time of firing, andsignificantly reduce or prevent the occurrence of cracks (delamination)at the boundary between the inner layer portion 11 m and the secondouter layer portion 12 b ₂.

As described above, the maximum measurement or the average measurement((W₀−W₁)/2) of the side gaps 12 c is still more preferably larger thanabout 30 μm and less than about 90 μm, for example. When the maximummeasurement or the average measurement ((W₀−W₁)/2) of the side gaps 12 cis larger than about 30 μm, the occurrence of cracks (delamination) issignificantly reduced or prevented in a stable manner at the boundarybetween the inner layer portion 11 m and the inner portion 12 b ₂₁. Inthe case where the maximum measurement or the average measurement((W₀−W₁)/2) of the side gaps 12 c is about 90 μm or more, theelectrostatic capacitance of the multilayer ceramic capacitor 10 becomestoo small, and it is not preferable. In other words, in the case wherethe maximum measurement or the average measurement ((W₀−W₁)/2) of theside gaps 12 c is less than about 90 μm, the electrostatic capacitanceof the multilayer ceramic capacitor 10 is secured.

As described above, the thickness T₁ of the inner layer portion 11 m inthe stacking direction of the multilayer body 11 is larger than thewidth measurement W₁ of the inner layer portion 11 m, in which theplurality of conductive layers 13 are present in the widthwise directionW of the multilayer body 11. Further, the thickness T₁ of the innerlayer portion 11 m in the stacking direction of the multilayer body 11preferably is larger than the width of the multilayer body 11.

As will be described below, the boundary portion 12 z of the outerportion 12 b ₂₂ with the inner portion 12 b ₂₁ improves the stickingforce between the outer portion 12 b ₂₂ and the inner portion 12 b ₂₁.Thus, even if the adhesiveness among the first dielectric layers 12 xpresent at the side gaps 12 c decreases due to the thicker inner layerportion 11 m, the occurrence of cracks (delamination) is significantlyreduced or prevented at the boundary between the outer portion 12 b ₂₂and the inner portion 12 b ₂₁. Accordingly the contraction force due tothe thermal contraction of the outer portion 12 b ₂₂ is allowed to acton the inner portion 12 b ₂₁. This makes it possible to alleviate theinternal stress applied to the boundary between the inner layer portion11 m and the inner portion 12 b ₂₁ due to the difference in thermalcontraction ratio between the conductive layer and the dielectric layerat the time of firing, and significantly reduce or prevent theoccurrence of cracks (delamination) at the boundary between the innerlayer portion 11 m and the inner portion 12 b ₂₁.

As described above, each layer of the second dielectric layer 12 y andthe plurality of the first dielectric layers 12 x includes bariumtitanate as the primary component. The adhesiveness between the innerportion 12 b ₂₁ and the outer portion 12 b ₂₂ preferably is improved byforming close chemical bonding at the boundary between the inner portion12 b ₂₁ and the outer portion 12 b ₂₂. As a result, the occurrence ofcracks (delamination) is significantly reduced or prevented at theboundary between the inner portion 12 b ₂₁ and the outer portion 12 b₂₂.

As described above, the boundary portion 12 z of the outer portion 12 b₂₂ with the inner portion 12 b ₂₁ has a larger Si content than themiddle portion 12 m of the outer portion 12 b ₂₂. Further, the top layerportion 12 s of the outer portion 12 b ₂₂ on the second principlesurface 112 side has a larger Si content compared to the middle portion12 m of the outer portion 12 b ₂₂.

Now, a method is described for increasing Si content at each one of theboundary portion 12 z and the top surface portion 12 s of the outerportion 12 b ₂₂, compared to the middle portion 12 m of the outerportion 12 b ₂₂. When the temperature and gaseous atmosphere at the timefiring of the multilayer ceramic capacitor 10 are set in such a way thatSi segregates from grain boundaries of ceramic articles, the graingrowth of ceramic particles progresses in the outer portion 12 b ₂₂ thathas a larger Si content, and Si segregates from grain boundaries ofcoarsened ceramic particles. Segregated Si moves along the grainboundaries of ceramic particles and accumulates at each one of theboundary portion 12 z and the top surface portion 12 s of the outerportion 12 b ₂₂. As a result, the Si content at each one of the boundaryportion 12 z and the top surface portion 12 s of the outer portion 12 b₂₂ becomes larger than that of the middle portion 12 m of the outerportion 12 b ₂₂.

In the case where the boundary portion 12 z of the outer portion 12 b ₂₂with the inner portion 12 b ₂₁ has a larger Si content than a middleportion 12 m of the outer portion 12 b ₂₂, the sticking force betweenthe outer portion 12 b ₂₂ and the inner portion 12 b ₂₁ is improved. Thereason may be that Si, which has moved along the grain boundaries ofceramic particles as described above, fills a minute void that isabundantly present in the boundary between the outer portion 12 b ₂₂ andthe inner portion 12 b ₂₁, thus connecting the outer portion 12 b ₂₂ andthe inner portion 12 b ₂₁ together. Thus, it is considered that theconcentration of segregated Si at the boundary portion 12 z is promotedor, conversely, the sticking force between the outer portion 12 b ₂₂ andthe inner portion 12 b ₂₁ is improved by separately performing theformation of the inner portion 12 b ₂₁ and the formation of the outerportion 12 b ₂₂ and allowing the minute voids to be formed at theboundary between the inner portion 12 b ₂₁ and the outer portion 12 b₂₂.

In the case where the top surface portion 12 s of the outer portion 12 b₂₂ at the second principle surface 112 side has a larger Si contentamount than the middle portion 12 m of the outer portion 12 b ₂₂, adecline in mechanical strength of the multilayer body 11 at the time offorming the outer electrode 14 is significantly reduced or prevented.The reason is that the mechanical strength of the multilayer body 11decreases when a glass component contained in the outer electrode 14reacts with a ceramic dielectric material of the multilayer body 11 atthe time of forming the outer electrode 14. In this case, the multilayerbody 11 is prone to crack that starts from an end portion of contactportion with the outer electrode 14 on a center side of the multilayerbody 11 when the multilayer ceramic capacitor 10 receives an externalforce during mounting or after the mounting. In the case where the outerportion 12 b ₂₂ has a larger Si content amount, the reaction between theglass component contained in the outer electrode 14 and the ceramicdielectric material of the multilayer body 11 is significantly reducedor prevented. As a result, the decline in mechanical strength of themultilayer body 11 at the time of forming the outer electrode 14 issignificantly reduced or prevented.

In the case where a rare earth compound is added to the primarycomponent that is the perovskite type compound represented as ABO₃ ateach one of the plurality of dielectric layers 12, the molar ratio ofthe rare earth compound relative to Ti is preferably higher in thematerials of each one of the partial set of the first dielectric layers12 x included in the inner layer portion 11 m and the first dielectriclayer 12 x forming the inner portion 12 b ₂₁, compared to that of thematerials of the second dielectric layer 12 y of the outer portion 12 b₂₂. In other words, the inner layer portion 11 m and the inner portion12 b ₂₁ preferably contain a higher amount of the rare earth elementthan the outer portion 12 b ₂₂.

As the rare earth element, Dy, Gd, Y, La or the like may be added toincrease functionality of the multilayer ceramic capacitor 10, forexample. Specifically, the addition of the rare earth element stabilizesa capacitance temperature characteristic and prolongs a high temperatureload life of insulating resistance in the multilayer ceramic capacitor10.

The rare earth element is, however, prone to concentrate at grainboundaries of ceramic particles or segregation layers, and has theproperty that it easily be eluted with water-soluble flux. Thus, in somecases, a ceramic component containing the rare earth element may beeluted with an organic acid such as adipic acid or the like, which isincluded in the water-soluble flux for use in soldering at the time ofmounting the multilayer ceramic capacitor 10. In such cases, crackingmay occur at the outer layer of an embrittled multilayer body from whichceramic components are eluted.

Accordingly, the molar ratio of the rare earth element relative to Ti inthe materials of each one of the partial set of the first dielectriclayers 12 x included in the inner layer portion 11 m and the firstdielectric layer 12 x of the inner portion 12 b ₂₁ is preferably about0.003 or more, and the molar ratio of the rare earth element relative toTi in the materials of the second dielectric layer 12 y of the outerportion 12 b ₂₂ is preferably less than about 0.003, for example.

In the case where the molar ratio of the rare earth element relative toTi preferably is about 0.003 or more in the materials of the firstdielectric layer 12 x included in the inner layer portion 11 m, thecapacitance temperature characteristic is stabilized and the hightemperature load life of insulating resistance is prolonged in themultilayer ceramic capacitor 10.

In the case where the molar ratio of the rare earth element relative toTi preferably is less than about 0.003 in the materials of the seconddielectric layer 12 y of the outer portion 12 b ₂₂, the occurrence ofcracks at the outer portion 12 b ₂₂, which is due to elution of ceramiccomponents from the outer portion 12 b ₂₂ and embrittlement of the outerportion 12 b ₂₂, is significantly reduced or prevented. The foregoingfeatures and their effects are confirmed by experiments performed withdifferent Dy contents. Here, Dy is used as one example of the rare earthelement. Similar effects are also confirmed in cases where Gd, Y, or Lais used in place of Dy.

In the case where a Mn compound is added to the primary component thatis the perovskite type compound represented as ABO₃ at each one of theplurality of dielectric layers 12, the molar ratio of Mn relative to Tiis preferably higher in the materials of each one of the partial set ofthe first dielectric layers 12 x included in the inner layer portion 11m, the first dielectric layer 12 x of the first outer layer portion 12 b₁, and the first dielectric layer 12 x of the inner portion 12 b ₂₁,compared to that of the materials of the second dielectric layer 12 y ofthe outer portion 12 b ₂₂. In other words, the inner layer portion 11 mand the inner portion 12 b ₂₁ preferably contain more Mn than the outerportion 12 b ₂₂.

Color becomes brighter in the case where the dielectric layer has asmaller Mn content. Thus, in the case where each one of the inner layerportion 11 m, the first outer layer portion 12 b ₁, and the innerportion 12 b ₂₁ contains more Mn than the outer portion 12 b ₂₂, thecolor of the outer portion 12 b ₂₂ becomes brighter compared to thecolor of each one of the inner layer portion 11 m, the first outer layerportion 12 b ₁, and the inner portion 12 b ₂₁. This makes it possible tofacilitate visual discrimination between the first principle surface 111and the second principle surface 112 of the multilayer ceramic capacitor10.

Thus, relative positions of the first principle surface 111 and thesecond principle surface 112 of the multilayer ceramic capacitor 10 maybe identified by observing the multilayer ceramic capacitor 10 with animage capturing camera or the like. This makes it possible to align theposition of the multilayer ceramic capacitor 10 automatically in such away that the second principle surface 112 becomes a mounting surface atthe time of mounting the multilayer ceramic capacitor 10.

For example, the molar ratio of Mn relative to Ti in the materials ofeach one of the partial set of the first dielectric layers 12 x includedin the inner layer portion 11 m, the first dielectric layer 12 x of thefirst outer layer portion 12 b ₁, and the first dielectric layer 12 x ofthe inner portion 12 b ₂₁ is preferably about 0.0008 or more, and themolar ratio of Mn relative to Ti in the materials of the seconddielectric layer 12 y of the outer portion 12 b ₂₂ is preferably lessthan about 0.0008, for example. The foregoing features and their effectsare confirmed by experiments performed with different Mn contents.

Next, a component-mounted body in which the multilayer ceramic capacitor10 according to the present preferred embodiment is mounted on acomponent-receiving body is described with reference to the drawings.

FIG. 10 is a cross sectional view illustrating a structure of amultilayer ceramic capacitor mounted body according to the preferredembodiment 1 of the present invention. As illustrated in FIG. 10, amultilayer ceramic capacitor mounted body 10 x according to thepreferred embodiment 1 of the present invention includes a multilayerceramic capacitor 10 and a component-receiving body 1 on which themultilayer ceramic capacitor 10 is mounted, such as a circuit board orthe like. The multilayer ceramic capacitor 10 is mounted on thecomponent-receiving body 1 in such a way that the second principlesurface 112 is disposed at the component-receiving body 1 side.

Specifically, the component-receiving body 1 includes a pair of lands 20on its top surface, and the lands 20 are arranged at intervals. Each oneof the pair of outer electrodes of the multilayer ceramic capacitor 10is electrically connected to a corresponding one of the pair of lands 20via solder 30 that defines and serves as a bonding agent. The bondingagent is not limited to solder, and may be any material capable ofjoining the pair of outer electrodes 14 and the pair of lands 20mechanically and electrically.

A width measurement W_(L) of each one of the pair of lands 20 is lessthan the width measurement W₀ of the multilayer body 11. The widthmeasurement W_(L) of each one of the pair of lands 20 is preferably lessthan the width measurement W₁ of the inner layer portion 11 m.

In the case where the width measurement W_(L) of each one of the pair oflands 20 is less than the width measurement W₀ of the multilayer body11, each one of the pair of outer electrodes receives compressive stressfrom the solder 30 in the widthwise direction W of the multilayer body11. The compressive stress applied to the pair of outer electrodes 14also applies to the inner portion 12 b ₂₁ via the outer portion 12 b ₂₂.This makes it possible to alleviate internal stress applied to aboundary between the inner layer portion 11 m and the second outer layerportion 12 b ₂, and significantly reduce or prevent the occurrence ofcracks (delamination) at the boundary between the inner layer portion 11m and the second outer layer portion 12 b ₂.

In the case where the width measurement W_(L) of each one of the pair oflands 20 is less than the width measurement W₁ of the inner layerportion 11 m, the compressive stress to be applied to the inner portion12 b ₂₁ via the outer portion 12 b ₂₂ increases, and the internal stressto be applied to the boundary between the inner layer portion 11 m andthe second outer layer portion 12 b ₂ is further alleviated. This makesit possible to significantly reduce or prevent the occurrence of cracks(delamination) at the boundary between the inner layer portion 11 m andthe second outer layer portion 12 b ₂.

Next, a multilayer ceramic capacitor array including a plurality ofmultilayer ceramic capacitors 10 according to the present preferredembodiment is described with reference to the drawings.

FIG. 11 is a plan view illustrating a structure of a multilayer ceramiccapacitor array according to the preferred embodiment 1 of the presentinvention. FIG. 12 is a cross sectional view of the multilayer ceramiccapacitor array of FIG. 11 viewed from a line XII-XII arrow direction.

As illustrated in FIGS. 11 and 12, a multilayer ceramic capacitor array10 s according to the preferred embodiment 1 of the present inventionincludes a plurality of multilayer ceramic capacitors 10, an elongatedcarrier tape 5 in which a plurality of depressed portions 5 h arearranged at intervals to respectively store the plurality of multilayerceramic capacitors 10, and a packaging body 4 including a cover tape 6configured to cover the plurality of depressed portions 5 h by attachingto the carrier tape 5. The plurality of multilayer ceramic capacitors 10is stored inside respective ones of the plurality of depressed portions5 h in such a way that the second principle surface 112 is disposed on abottom 5 b side of each depressed portion 5 h.

A plurality of multilayer ceramic capacitors 10 to be included in themultilayer ceramic capacitor array 10 s is picked up from the packagingbody 4 piece by piece and mounted on a component-receiving body 1.Specifically, in a state where the cover tape 6 is peeled off from thecarrier tape 5, the multilayer ceramic capacitor 10 is picked up fromthe carrier tape 5 piece by piece by holding the multilayer ceramiccapacitor 10 by suction at the first principle surface 111 side, andthen mounted on the component-receiving body 1. As a result, themultilayer ceramic capacitor 10 is mounted on the component-receivingbody 1 in such a way that the second principle surface 112 of themultilayer ceramic capacitor 10 is disposed at the component-receivingbody 1 side.

In other words, the multilayer ceramic capacitor mounted body 10 xaccording to the preferred embodiment 1 of the present invention may beeasily fabricated by using the multilayer ceramic capacitor array 10 saccording to the preferred embodiment 1 of the present invention.

Next, a multilayer ceramic capacitor according to preferred embodiment 2of the present invention is described. It should be noted that themultilayer ceramic capacitor according to the preferred embodiment 2 ofthe present invention differs from the multilayer ceramic capacitoraccording to the preferred embodiment 1 only in shape of a boundaryportion between an outer portion and an inner portion of multilayerbody. Thus, the description regarding the other elements will not berepeated.

Preferred Embodiment 2

The shape of a boundary portion between an outer portion and an innerportion of multilayer body of the multilayer ceramic capacitor accordingto the preferred embodiment 2 of the present invention is a shaperendered by a mother sheet group pressure-bonding method. Thus, first,the mother sheet group pressure-bonding method according to the presentpreferred embodiment is described.

FIG. 13 is a cross sectional view illustrating a state where mothersheet groups of the multilayer ceramic capacitors according to thepreferred embodiment 2 of the present invention are beingpressure-bonded. FIG. 13 illustrates the same cross sectional view as inFIG. 8. FIG. 13 illustrates only a portion that corresponds to two ofpartial multilayer bodies 11 p.

As illustrated in FIG. 13, in the present preferred embodiment, aplurality of mother sheets defining a first outer layer portion 12 b ₁,a plurality of mother sheets defining an inner layer portion 11 m, and aplurality of mother sheets defining an inner portion 12 b ₂₁ are stackedin this order to form mother sheet groups.

The mother sheet groups placed on a base 90 is being compressed andpressure-bonded by pressing a die plate 91 and a rubber 93 attached to abottom surface of the die plate 91 from the side of the mother sheetsforming the inner portion 12 b ₂₁ along the stacking direction of themother sheet group as denoted by an arrow 92.

In the mother sheet group, a stacking density at a locationcorresponding to the inner layer portion 11 m is higher than a stackingdensity at a location corresponding to a side gap 12 c. Thus, the rubber93 pressed down upon the mother sheet group convexly bulges out downwarddue to flow deformation toward the location corresponding to the sidegap 12 c from the location corresponding to the inner layer portion 11 mas denoted by dotted lines 93 s in FIG. 13. This allows the mothersheets to be pressure-bonded to each other at the location correspondingto the side gap 12 c of the mother sheet group.

FIG. 14 is a cross sectional view illustrating a halfway state where themother sheet group thus pressured-bonded and a plurality of secondceramic green sheets are being pressure-bonded. FIG. 14 illustrates onlya portion that corresponds to two of soft multilayer bodies 11 q. Asillustrated in FIG. 14, the mother sheet group that is pressure-bondedand the plurality of second ceramic green sheets are being compressedand pressure-bonded by pressing down the die plate 91 from the side ofthe mother sheets of the outer portion 12 b ₂₂ along the stackingdirection of the mother sheet group as denoted by the arrow 92. Thiscompletes the fabrication of a mother multilayer body.

FIG. 15 is a cross sectional view illustrating a state where the mothermultilayer body is cut. FIG. 15 illustrates only a portion thatcorresponds to two of the soft multilayer bodies 11 q. As illustrated inFIG. 15, the plurality of second ceramic green sheets follows the shapeof the top surface of the pressure-bonded mother sheet group, andconvexly bulges out downward at the location corresponding to the sidegap 12 c due to flow deformation toward the location corresponding tothe side gap 12 c from the location corresponding to the inner layerportion 11 m.

Accordingly, a boundary portion 12 z of the outer portion 12 b ₂₂ withthe inner portion 12 b ₂₁ includes curved portions 12 zw protrudingdownward at the locations corresponding to the side gaps 12 c in thewidthwise direction W of the multilayer body 11.

The mother multilayer body is cut at a cut line CL and separated todefine a plurality of the soft multilayer bodies 11 q. Subsequent stepsafter the step described above are similar to those in the fabricationmethod of the multilayer ceramic capacitor 10 according to the preferredembodiment 1.

In the multilayer ceramic capacitor according to the present preferredembodiment, the adhesiveness among the first dielectric layers 12 xpresent at the side gap 12 c is improved. As a result, the occurrence ofcracks (delamination) is significantly reduced or prevented at the firstdielectric layers 12 x present at the side gaps 12 c.

Further in the case where the boundary portion 12 z of the outer portion12 b ₂₂ with the inner portion 12 b ₂₁ includes the curved portions 12zw protruding downward at the locations corresponding to the side gaps12 c in the widthwise direction W of the multilayer body 11, the outerportion 12 b ₂₂ holds the inner portion 12 b ₂₁ between a pair of thecurved portions 12 zw. This allows the contraction force of the outerportion 12 b ₂₂ to apply effectively to the inner portion 12 b ₂₁. As aresult, the internal stress, which is applied to the boundary betweenthe inner layer portion 11 m and the second outer layer portion 12 b ₂due to the difference in thermal contraction ratio between theconductive layer and the dielectric layer at the time of firing, isalleviated. This makes it possible to further reduce or prevent theoccurrence of cracks (delamination) at the boundary between the innerlayer portion 11 m and the second outer layer portion 12 b ₂.

Next, exemplary non-limiting experiments are described. The exemplarynon-limiting experiments evaluate effects of thickness and Si contentamount at each one of the inner portion and the outer portion onreliability and crack occurrence at the time of firing of multilayerceramic capacitor.

Exemplary Experiment 1

In the exemplary experiment 1, 21 types of multilayer ceramiccapacitors, namely, comparison examples 1 to 11 and preferred embodimentexamples 1 to 10 are prepared. First, conditions (design values) commonfor the 21 types of multilayer ceramic capacitors are described.

The thickness of the first outer layer portion is set to 40 μm, thethickness of the second outer layer portion is set to 100 μm, thethickness of the inner layer portion is set to 620 μm, the thickness ofthe conductive layer is set to 0.8 μm, the number of layers in theconductive layers is set to 330, and the molar ratio of Si relative toTi in the materials of the first dielectric layer is set to 0.013.

For each one of the 21 types of multilayer ceramic capacitors includingthe comparison examples 1 to 11 and the preferred embodiment examples 1to 10, the molar ratio of Si relative to Ti in the materials of thesecond dielectric layers of the outer portion, the thickness of theinner portion, and the thickness of the outer portion are set as in thefollowing Table 1.

For the evaluation of crack occurrence at the time of firing ofmultilayer ceramic capacitor, ten pieces of multilayer ceramiccapacitors are prepared for each one of the 21 types of multilayerceramic capacitors. If any one of the ten pieces is found to have acrack occurrence, the multilayer ceramic capacitor type is evaluated as“bad”, and if none of the ten pieces is found to have a crackoccurrence, the multilayer ceramic capacitor type is evaluated as“good”. Presence or absence of the occurrence of cracks is determined bygrinding the individual piece to expose a WT cross section that goesthrough a center of multilayer body and by observing an exposed crosssection with an optical microscope.

For the evaluation of reliability of multilayer ceramic capacitor, 20pieces of multilayer ceramic capacitors are prepared for each one of the21 types of multilayer ceramic capacitors. If any one of the 20 piecesis found to have IR value degradation, the multilayer ceramic capacitortype is evaluated as “bad”, and if none of the 20 pieces is found tohave the IR value degradation, the multilayer ceramic capacitor type isevaluated as “good”.

The reliability of multilayer ceramic capacitor is evaluated by highlyaccelerated life test. Specifically, in an ambient temperature of 150degrees C., a voltage of 8 V is applied to a multilayer ceramiccapacitor, and the multilayer ceramic capacitor is determined to havethe IR value degradation if an IR value of the multilayer ceramiccapacitor reaches 10 kΩ or less within ten hours.

TABLE 1 MOLAR MOLAR DIFFERENCE IN RATIO OF SI RATIO OF SI MOLAR RATIO OFSI TO TI OF TO TI OF TO TI BETWEEN FIRST THICKNESS THICKNESS FIRSTSECOND DIELECTRIC LAYER OF INNER OF OUTER DIELECTRIC DIELECTRIC ANDSECOND PORTION PORTION CRACK LAYER LAYER DIELECTRIC LAYER (μm) (μm)OCCURRENCE RELIABILITY PREFERRED 0.013 0.017 0.004 10 90 GOOD GOODEMBODIMENT EXAMPLE 1 PREFERRED 0.013 0.017 0.004 20 80 GOOD GOODEMBODIMENT EXAMPLE 2 PREFERRED 0.013 0.017 0.004 30 70 GOOD GOODEMBODIMENT EXAMPLE 3 PREFERRED 0.013 0.017 0.004 40 60 GOOD GOODEMBODIMENT EXAMPLE 4 PREFERRED 0.013 0.017 0.004 50 50 GOOD GOODEMBODIMENT EXAMPLE 5 COMPARISON 0.013 0.017 0.004 60 40 BAD GOOD EXAMPLE1 COMPARISON 0.013 0.017 0.004 70 30 BAD GOOD EXAMPLE 2 PREFERRED 0.0130.029 0.016 10 90 GOOD GOOD EMBODIMENT EXAMPLE 6 PREFERRED 0.013 0.0290.016 20 80 GOOD GOOD EMBODIMENT EXAMPLE 7 PREFERRED 0.013 0.029 0.01630 70 GOOD GOOD EMBODIMENT EXAMPLE 8 PREFERRED 0.013 0.029 0.016 40 60GOOD GOOD EMBODIMENT EXAMPLE 9 PREFERRED 0.013 0.029 0.016 50 50 GOODGOOD EMBODIMENT EXAMPLE 10 COMPARISON 0.013 0.029 0.016 60 40 BAD GOODEXAMPLE 3 COMPARISON 0.013 0.029 0.016 70 30 BAD GOOD EXAMPLE 4COMPARISON 0.013 0.033 0.020 10 90 GOOD BAD EXAMPLE 5 COMPARISON 0.0130.033 0.020 20 80 GOOD GOOD EXAMPLE 6 COMPARISON 0.013 0.033 0.020 30 70GOOD GOOD EXAMPLE 7 COMPARISON 0.013 0.033 0.020 40 60 GOOD GOOD EXAMPLE8 COMPARISON 0.013 0.033 0.020 50 50 GOOD GOOD EXAMPLE 9 COMPARISON0.013 0.033 0.020 60 40 BAD GOOD EXAMPLE 10 COMPARISON 0.013 0.033 0.02070 30 BAD GOOD EXAMPLE 11

Table 1 summarizes evaluation results obtained by the exemplaryexperiment 1. As illustrated in Table 1, the occurrence of cracks at thetime of firing of multilayer ceramic capacitor is significantly reducedor prevented in each one of the preferred embodiment examples 1 to 10and the comparison examples 5 to 9, in which the thickness of the outerportion is equal to or larger than the thickness of the inner portion.

The multilayer ceramic capacitor of the comparison example 5 is found tobe low in reliability. From this, it is discovered that the reliabilityof multilayer ceramic capacitor may decrease in the case where the molarratio of Si relative to Ti in the materials of the second dielectriclayer of the outer portion is larger than 0.029 and the thickness of theinner portion is less than 20 μm.

Next, exemplary non-limiting experiments are described that evaluateeffects of the boundary portion of the outer portion with the innerportion having a higher Si content amount on the occurrence of cracks atthe multilayer ceramic capacitor due to an external stress.

Exemplary Experiment 2

In the exemplary experiment 2, four types of multilayer ceramiccapacitors, namely, comparison examples 12 to 13 and preferredembodiment examples 11 to 12 are prepared. First, conditions (designvalues) common for the four types of multilayer ceramic capacitors aredescribed.

Here, the structure of the first outer layer portion is made similar tothe structure of the second outer layer portion. The thickness of thefirst outer layer portion is set to 100 μm, the thickness of the secondouter layer portion is set to 100 μm, the thickness of the inner layerportion is set to 620 μm, the thickness of the conductive layer is setto 0.8 μm, and the number of layers in the conductive layers is set to330.

For each one of component-mounted bodies in which the four types ofmultilayer ceramic capacitors, namely, the comparison examples 12 to 13and the preferred embodiment examples 11 to 12 are respectively mounted,the molar ratio of Si relative to Ti in the materials of the firstdielectric layer, the molar ratio of Si relative to Ti in the materialsof the second dielectric layer of the outer portion, the thickness ofthe inner portion, and the thickness of the outer portion are set as inthe following Table 2.

For the evaluation of crack occurrence due to an external stress in amultilayer ceramic capacitor, ten pieces of multilayer ceramic capacitormounted bodies are prepared for each one of the four types of multilayerceramic capacitor mounted bodies. If any one of the ten pieces ofmultilayer ceramic capacitor mounted bodies is found to have a crackthat reaches the conductive layer, that type is evaluated as “bad”, andif none of the ten pieces of multilayer ceramic capacitor mounted bodiesis found to have a crack that reaches the conductive layer, that type isevaluated as “good”.

FIG. 16 is a schematic view illustrating a state where a substrate onwhich a multilayer ceramic capacitor is mounted is bended in theexemplary experiment 2. As illustrated in FIG. 16, the evaluation ofcrack occurrence due to an external stress in a multilayer ceramiccapacitor is performed by checking whether a crack occurs or not at amultilayer ceramic capacitor 10 due to an external stress that appliesto the multilayer ceramic capacitor 10 when a component-receiving body 1on which the multilayer ceramic capacitor 10 is mounted is bent by apressing jig 8.

Specifically, the multilayer ceramic capacitor 10 is mounted on a bottomsurface of a component-receiving body 1, and the pressing jig 8 ispressed against the component-receiving body 1 at a right angle from atop surface side of the component-receiving body 1 as illustrated withan arrow 8 a in FIG. 16 while supporting the component-receiving body 1by a pair of support portions 7 at both end portions of the bottomsurface of the component-receiving body 1. This causes thecomponent-receiving body 1 to convexly curve downward. As a result, inthe multilayer ceramic capacitor 10, a tensile stress is loaded on themultilayer body 11 via a pair of outer electrodes 14. Whether or notthis tensile stress (external stress) causes a crack occurrence in themultilayer body 11 is checked. Presence or absence of the occurrence ofcracks is determined by observing a cross section that is exposed bygrinding the multilayer body with an optical microscope.

TABLE 2 MOLAR RATIO OF MOLAR RATIO OF THICKNESS THICKNESS PRESENCE SI TOTI OF SI TO TI OF OF INNER OF OUTER OR FIRST DIELECTRIC SECOND PORTIONPORTION ABSENCE OF CRACK LAYER DIELECTRIC LAYER (μm) (μm) BOUNDARYOCCURRENCE PREFERRED 0.013 0.017 50 50 PRESENCE GOOD EMBODIMENT EXAMPLE11 COMPARISON 0.017 0.017 50 50 ABSENCE BAD EXAMPLE 12 PREFERRED 0.0130.029 50 50 PRESENCE GOOD EMBODIMENT EXAMPLE 12 COMPARISON 0.029 0.02950 50 ABSENCE BAD EXAMPLE 13

Table 2 summarizes evaluation results obtained by the exemplaryexperiment 2. As illustrated in Table 2, no crack that reaches theconductive layer is found in each one of the multilayer ceramiccapacitor mounted bodies in the preferred embodiment examples 11 and 12in which the boundary portion is present in the outer portion with theinner portion having a larger Si content amount. Even in the case wherethe occurrence of cracks is found at the outer portion, no crack extendsinto the inner portion. Thus, it is conceivable that the boundaryportion in the outer portion with the inner portion having a larger Sicontent has a function to prevent a crack from reaching the conductivelayer by stopping crack growth or deflect a direction of crack growth.

The present disclosure may be effectively applicable particularly tosmall size multilayer ceramic capacitors in which the thickness of thesecond outer layer portion 12 b ₂ is about 50 μm or more, theelectrostatic capacitance is about 10 μF or more, the lengthwisedimension of the multilayer body 11 is about 1.8 mm or less, and thenumber of stacked layers in the conductive layers 13 is about 300 ormore.

In particular, of the small size multilayer ceramic capacitors, thepresent disclosure is more effectively applicable to multilayer ceramiccapacitors in which the thickness T₁ of the inner layer portion 11 m inthe stacking direction of the multilayer body 11 is larger than thewidth measurement W₁ of the inner layer portion 11 m in which aplurality of conductive layers 13 is present in the widthwise directionW of the multilayer body 11 and multilayer ceramic capacitors in whichthe thickness T₁ of the inner layer portion 11 m in the stackingdirection of the multilayer body 11 is larger than the width measurementW₀ of the multilayer body 11.

Next, a non-limiting example of a method for measuring thicknesses of adielectric layer and a conductive layer of a multilayer ceramiccapacitor is described. FIG. 17 is a view illustrating an example of amagnified image of a cross section of a multilayer ceramic capacitorobserved with a scanning electron microscope. FIG. 17 illustrates aportion of the multilayer ceramic capacitor that is in contact with apotting compound 9 at the second principle surface 112 side.

When measuring the thicknesses of a dielectric layer and a conductivelayer of a multilayer ceramic capacitor, first, as illustrated in FIG.17, a line Lc extending in the stacking direction of a multilayer bodyand going through a center of the multilayer body is drawn on amagnified image of a cross section of the multilayer ceramic capacitorobserved with a scanning electron microscope. Next, a plurality of linesparallel to the line Lc is drawn at even intervals (pitch S). The pitchS may be set to about five to ten times the thickness of a dielectriclayer or a conductive layer to be measured. For example, in the casewhere a dielectric layer having a thickness of about 1 μm is to bemeasured, the pitch S may be set to about 5 μm. The same number of linesis drawn on both sides of the line Lc. In other words, in total, the oddnumber of lines is drawn including the line Lc. FIG. 17 illustrates fivelines including a line La to a line Le.

Next, the thicknesses of the dielectric layers and the conductive layersare measured on each one of the line La to the line Le. In the casewhere, on each one of the line La to the line Le, a conductive layer islost and dielectric layers adjacent to this lost conductive layer areconnected, or the magnified image is unclear at a measurement location,the thickness or distance is measured on another line drawn at alocation further separated from the line Lc.

For example, when measuring the thickness of dielectric layer 12, asillustrated in FIG. 17, a thickness D₁ on the line La, a thickness D₂ onthe line Lb, a thickness D₃ on the line Lc, a thickness D₄ on the lineLd, and a thickness D₅ on the line Le are measured, and an average valueof those measured thicknesses is obtained as the thickness of dielectriclayer 12.

For example, when calculating an average thickness of the plurality ofdielectric layers 12 in the inner layer portion 11 m, the thicknessaccording to the foregoing method is performed for each one of fivedielectric layers 12 including a dielectric layer 12 disposed atsubstantially the center of the inner layer portion 11 m in thethickness direction T and two pairs of dielectric layers 12 arranged atboth sides thereof. An average value of measured results is obtained asthe average thickness of the plurality of dielectric layers 12 in theinner layer portion 11 m.

In the case where the plurality of dielectric layers 12 includes lessthan five layers, the thicknesses of all the dielectric layers 12 aremeasured by the foregoing method, and an average value of measuredresults is obtained as the average thickness of the plurality ofdielectric layers 12.

In a method for measuring the length of the side gaps 12 c, grinding isperformed to expose the WT cross section that goes through a center ofthe multilayer body 11, and the cross section thus exposed is observedwith an optical microscope to measure the length of a longest side gap12 c.

In a method for measuring the width measurement W₁ of the inner layerportion 11 m, grinding is performed to expose the WT cross section thatgoes through a center of the multilayer body 11. Further, in the method,the cross section thus exposed is observed with an optical microscope tomeasure respective widths of a conductive layer 13 arranged closest tothe first principle surface 111 side, a conductive layer 13 arrangedclosest to the second principle surface 112 side, and a conductive layer13 arranged closest to the center of the inner layer portion 11 m in thestacking direction. Finally, an average value of these three measurementvalues is calculated and obtained as the width measurement W₁.

In a method for measuring the thickness T₁ of the inner layer portion 11m, grinding is performed to expose the WT cross section that goesthrough a center of the multilayer body 11, and the cross section thusexposed is observed with an optical microscope to measure the length ofa line segment that goes through the center of the multilayer body 11and connects the conductive layer 13 arranged closest to the firstprinciple surface 111 side and the conductive layer 13 arranged closestto the second principle surface 112 side with a minimum distance.

In a method for measuring the thickness of the first outer layer portion12 b ₁ or the second outer layer portion 12 b ₂, grinding is performedto expose the WT cross section that goes through a center of themultilayer body 11, and the cross section thus exposed is observed withan optical microscope to measure the thickness of the first outer layerportion 12 b ₁ or the second outer layer portion 12 b ₂ at a center ofthe multilayer body 11 in the widthwise direction.

Composition analysis of materials of the first dielectric layer 12 x orthe second dielectric layer 12 y may be performed by inductively coupledplasma (ICP) emission spectroscopic analysis or with awavelength-dispersive X-ray spectrometer (WDX). In the case where theelemental analysis is performed by ICP emission spectroscopic analysis,an analysis sample is powdered and dissolved with an acid, and asolution thus obtained is analyzed by ICP emission spectroscopicanalysis to determine the composition. In the case where the elementalanalysis is performed with a WDX, a multilayer body buried with resin isgrinded to expose the WT cross section, and the composition isdetermined using the WDX attached to a scanning electron microscope(SEM).

The boundary portion of the outer portion with the inner portion havinga larger Si content may be identified by grinding the multilayer bodyburied with resin to expose a WT cross section and by capturing abackscattering electron image of the cross section thus exposed with ascanning electron microscope (SEM) for observation. Alternatively,element mapping of the exposed cross section may be produced by using awavelength-dispersive X-ray spectrometer (WDX) attached to a scanningelectron microscope (SEM), and the boundary portion may be identified bydetermining the portion where Si content is large.

It is to be understood that the preferred embodiments described in thepresent disclosure are exemplary in all aspects and are not restrictive.It is intended that the scope of the present invention is determined bythe claims, not by the description described above, and includes allvariations, which come within the meaning and range of equivalency ofthe claims.

While preferred embodiments of the present invention have been describedabove, it is to be understood that variations and modifications will beapparent to those skilled in the art without departing from the scopeand spirit of the present invention. The scope of the present invention,therefore, is to be determined solely by the following claims.

What is claimed is:
 1. A multilayer ceramic capacitor comprising: amultilayer body including a plurality of dielectric layers and aplurality of conductive layers, which are stacked therein in a stackingdirection, and including a first principle surface and a secondprinciple surface that are opposite to each other in the stackingdirection, a first end surface and a second end surface that areopposite to each other in a length direction and connect the firstprinciple surface and the second principle surface, and a first sidesurface and a second side surface that are opposite to each other in awidth direction and connect the first principle surface and the secondprinciple surface as well as the first end surface and the second endsurface; and first and second outer electrodes provided on portions of asurface of the multilayer body and electrically connected to at leastone of the plurality of conductive layers; wherein the multilayer bodyincludes a first outer layer portion which includes a first of theplurality of dielectric layers closest to the first principle surface, asecond outer layer portion which includes a second of the plurality ofdielectric layers closest to the second principle surface, and an innerlayer portion adjacent to both of the first outer layer portion and thesecond outer layer portion, the inner layer portion including a portionextending from a first of the plurality of conductive layers closest tothe first principle surface to a second of the plurality of conductivelayers closest to the second principle surface in the stackingdirection; a dimension of the inner layer portion in the stackingdirection is greater than a dimension of the inner layer portion in thewidth direction; the second outer layer portion includes an outerportion including the second principle surface, and an inner portiondisposed adjacent to both of the outer portion and the inner layerportion; a dimension of the outer portion in the stacking direction isgreater than a dimension of the inner portion; and a composition ratioof Si relative to Ti in the outer portion is greater than that in theinner portion.
 2. The multilayer ceramic capacitor according to claim 1,wherein the dimension of the inner layer portion in the stackingdirection is greater than a dimension of the multilayer body in thewidth direction.
 3. The multilayer ceramic capacitor according to claim2, wherein a boundary region adjacent to the inner portion has a largerSi content compared to a central region of the outer portion in thestacking direction.
 4. The multilayer ceramic capacitor according toclaim 3, wherein the first and second outer electrodes are disposed onportions of the second principle surface of the multilayer body; and asurface region including the second principle surface in the outerportion has a larger Si content compared to that of a central region ofthe outer portion in the stacking direction.
 5. The multilayer ceramiccapacitor according to claim 1, wherein a composition ratio of a rareearth element relative to Ti of the dielectric layers in the inner layerportion is higher than that in the outer portion.
 6. The multilayerceramic capacitor according to claim 1, wherein a composition ratio ofDy relative to Ti of the dielectric layers in the inner layer portion ishigher than that in the outer portion.
 7. The multilayer ceramiccapacitor according to claim 5, wherein each of a composition ratio ofMn relative to Ti of the dielectric layers in the inner layer portion, acomposition ratio of Mn relative to Ti of the dielectric layers in thefirst outer layer portion, and a composition ratio of Mn relative to Tiof the dielectric layers in the inner portion, is higher than that inthe outer portion.
 8. The multilayer ceramic capacitor according toclaim 4, wherein the composition ratio of Si relative to Ti in the outerportion is about 0.004 higher than that in the inner portion; thecomposition ratio of Si relative to Ti in the outer portion is not lessthan about 0.013 and not larger than about 0.03; a composition ratio ofa rare earth element composition relative to Ti in the dielectric layersof the inner layer portion is not less than about 0.003, and acomposition ratio of a rare earth element relative to Ti in the outerportion is less than about 0.003; each of a composition ratio of Mnrelative to Ti in the dielectric layers of the inner layer portion, acomposition ratio of Mn relative to Ti of the dielectric layers in thefirst outer layer portion, and a composition ratio of Mn relative to Tiof the dielectric layers in the inner portion is not less than about0.0008; and a composition ratio of Mn relative to Ti in the outerportion is not more than about 0.0008.
 9. A multilayer ceramic capacitorseries comprising: a plurality of multilayer ceramic capacitors, each ofthe plurality of multilayer ceramic capacitors being the multilayerceramic capacitor according to claim 1; and a package including acarrier tape and a cover tape, the carrier tape including a plurality ofcavities disposed apart from each other in which the plurality ofmultilayer ceramic capacitors are stored, the cover tape being attachedto the carrier tape and covering the plurality of cavities; wherein thesecond principle surfaces of the plurality of multilayer ceramiccapacitors face bottoms of the plurality of respective cavities.
 10. Amultilayer ceramic capacitor mount body comprising: the multilayerceramic capacitor according to claim 1; and a substrate on which themultilayer ceramic capacitor is mounted; wherein the second principlesurface of the multilayer ceramic capacitor faces the substrate.